Project Description
Various project to develop microprocessors based on FPGAs and a hardware decription language. Software environment for operation.


J-Processors is a family of projects (XYSC, J5, J6) centering around the creation of experimental microprocessors at the university UNIVALE in Governador Valadares, Brazil (www.univale.br)

• XYSC and J5 are environment to allow students of a computer science course to create their own processor designs. J5 is a family of simplified "normal" RISC-Processors, whereas XYSC is a family of extremely simplified computers. The features of these environments are:
  • An example processor (a smaller student project will be to modify it, e.g. add multiplication and division. A full scale project will be a new design from scratch.)
  • A control circuit for a processor. It allows to read and write registers and memory as well as to start and stop a program. Experiments with the processor can thus be conducted without BIOS, operating system or software debugger.
  • A control panel. This piece of software hooks up with the control circuit over a serial interface and exposes its functionality in a PC window.
  • An assembler, linker and loader. They are configurable to the architecture of the processor.
  • The hardware components of the processors are designed in VHDL, targeted for realization with the Xilinx toolchain and FPGAs.
  • The software components of the J-Processors project are realizad as C#.NET applications and assemblies.

• The J6 project will realize a multiprocessor system optimized for maximum thruput of database operations.