Project Description



J4 is part of a family of projects (J4, J5, J6) centering around the creation of experimental microprocessors at the university UNIVALE in Governador Valadares, Brazil (www.univale.br)

* J4 is a precursor of J5 and J6, experimenting with the best way of applying codeplex to make J5 and J6 truly open projects.

* J5 is an environment to allow students of a computer science course to create their own processor designs. J5 features:

• An example processor (a smaller project will be to modify it, e.g. add multiplication and division. A full scale project will be a new design from scratch.)
• A control circuit for a processor. It allows to read and write registers and memory as well as to start and stop a program. Experiments with the processor can thus be conducted without BIOS, operating system or software debugger.
• A control panel. This piece of software hooks up with the control circuit over a serial interface and exposes its functionality in a PC window.
• An assembler, linker and loader. They are configurable to the architecture of the processor.
• The hardware components of the J5 project are realizad in VHDL, targeted for realization with the Xilinx toolchain and FPGAs.
• The software components of the J5 project are realizad as C#.NET applications and assemblies.

* The J6 project will realize a multiprocessor system optimized for maximum thruput of database operations.